Ðþí mY   8 Y”   (            Å Y\                             K    sancloud,am335x-boneenhanced ti,am335x-bone-black ti,am335x-bone ti,am33xx                                   +            7SanCloud BeagleBone Enhanced       chosen        F   =/ocp/interconnect@44c00000/segment@200000/target-module@9000/serial@0         aliases       C   I/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0        ?   N/ocp/interconnect@48000000/segment@0/target-module@2a000/i2c@0        D   S/ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0       F   X/ocp/interconnect@44c00000/segment@200000/target-module@9000/serial@0         B   `/ocp/interconnect@48000000/segment@0/target-module@22000/serial@0         B   h/ocp/interconnect@48000000/segment@0/target-module@24000/serial@0         G   p/ocp/interconnect@48000000/segment@100000/target-module@a6000/serial@0        G   x/ocp/interconnect@48000000/segment@100000/target-module@a8000/serial@0        G   €/ocp/interconnect@48000000/segment@100000/target-module@aa000/serial@0        D   ˆ/ocp/interconnect@48000000/segment@100000/target-module@cc000/can@0       D   �/ocp/interconnect@48000000/segment@100000/target-module@d0000/can@0       %   –/ocp/target-module@47400000/usb@1400          %   ›/ocp/target-module@47400000/usb@1800          )    /ocp/target-module@47400000/usb-phy@1300          )   ¥/ocp/target-module@47400000/usb-phy@1b00          Y   ª/ocp/interconnect@4a000000/segment@0/target-module@100000/switch@0/ethernet-ports/port@1          Y   ´/ocp/interconnect@4a000000/segment@0/target-module@100000/switch@0/ethernet-ports/port@2          ?   ¾/ocp/interconnect@48000000/segment@0/target-module@30000/spi@0        D   Ã/ocp/interconnect@48000000/segment@100000/target-module@a0000/spi@0       ?   È/ocp/interconnect@48000000/segment@0/target-module@60000/mmc@0        D   Í/ocp/interconnect@48000000/segment@100000/target-module@d8000/mmc@0       "   Ò/ocp/target-module@47810000/mmc@0         cpus                         +       cpu@0             arm,cortex-a8         
   ×ti,am3352            åcpu          ñ             õ           	           cpu          “à        *           :         idle-states    mpu_gate              arm,idle-state          F   (        W   Z        g  ,         x        ˆ               opp-table             operating-points-v2-ti-cpu          �           ˆ      opp50-300000000         —    á£         ž ~ð 4¸ É(        ¬               ½      opp100-275000000            —    d*À        ž Èà rð Ð        ¬      ÿ         ½      opp100-300000000            —    á£         ž Èà rð Ð        ¬                ½      opp100-500000000            —    Íe         ž Èà rð Ð        ¬     ÿÿ      opp100-600000000            —    #ÃF         ž Èà rð Ð        ¬      @      opp120-600000000            —    #ÃF         ž O€ ñÀ ­@        ¬     ÿÿ      opp120-720000000            —    *êT         ž O€ ñÀ ­@        ¬      €      oppturbo-720000000          —    *êT         ž 9à ×p œP        ¬     ÿÿ      oppturbo-800000000          —    /¯         ž 9à ×p œP        ¬            oppnitro-1000000000         —    ;šÊ         ž 7È ÐD ŸL        ¬               pmu@4b000000              arm,cortex-a8-pmu           É            ñK              Ôdebugss       soc           ti,omap-infra      mpu           ti,omap3-mpu            Ômpu         Þ               ocp           simple-bus                       +            æ        Ôl3_main         ˆ   f   interconnect@44c00000             ti,am33xx-l4-wkup simple-bus              ñDÀ     DÀ    DÀ    DÀ            íap la ia0 ia1                        +         $  æ    DÀ        DÐ         Dà             ˆ   g   wkup_m3@100000            ti,am3352-wkup-m3            ñ     @              
  íumem dmem           Ôwkup_m3         ÷am335x-pm-firmware.elf          ˆ   2      segment@0             simple-bus                       +         0  æ                                            segment@100000            simple-bus                       +         0  æ         @   @  @                          target-module@0           ti,sysc-omap4 ti,sysc            ñ               írev                      +           æ          @       	  disabled          target-module@80000           ti,sysc       	  disabled                         +           æ                    segment@200000            simple-bus                       +        €  æ                         0   0      @   @      P   P      `   `      p   p      €   €      �   �                 °   °      À   À      Ð   Ð      ð   ð        !         "         #        #        #      0  #0     @  #@     P  #P     `  #`     p  #p     €  #€     �  #�        #      à  #à     ð  #ð      à   à        $         (        target-module@0           ti,sysc-omap4 ti,sysc            ñ               írev                      +           æ               prcm@0            ti,am3-prcm simple-bus           ñ                             +           æ                    ˆ   h   clocks                       +            ˆ   i   clk_32768_ck                          fixed-clock           €         ˆ         clk_rc32k_ck                          fixed-clock           }         ˆ         virt_19200000_ck                          fixed-clock         $ø         ˆ   -      virt_24000000_ck                          fixed-clock         n6         ˆ   .      virt_25000000_ck                          fixed-clock         }x@        ˆ   /      virt_26000000_ck                          fixed-clock         Œº€        ˆ   0      tclkin_ck                         fixed-clock          ·         ˆ         dpll_core_ck@490                          ti,am3-dpll-core-clock          	   	   	         ñ  �  \  h        ˆ   
      dpll_core_x2_ck                       ti,am3-dpll-x2-clock            	   
        ˆ         dpll_core_m4_ck@480                       ti,divider-clock            	           *            ñ  €         5        ˆ         dpll_core_m5_ck@484                       ti,divider-clock            	           *            ñ  „         5        ˆ         dpll_core_m6_ck@4d8                       ti,divider-clock            	           *            ñ  Ø         5        ˆ   j      dpll_mpu_ck@488                       ti,am3-dpll-clock           	   	   	         ñ  ˆ     ,        ˆ         dpll_mpu_m2_ck@4a8                        ti,divider-clock            	           *            ñ  ¨         5        ˆ   k      dpll_ddr_ck@494                       ti,am3-dpll-no-gate-clock           	   	   	         ñ  ”  4  @        ˆ         dpll_ddr_m2_ck@4a0                        ti,divider-clock            	           *            ñ            5        ˆ         dpll_ddr_m2_div2_ck                       fixed-factor-clock          	           L           W           ˆ   l      dpll_disp_ck@498                          ti,am3-dpll-no-gate-clock           	   	   	         ñ  ˜  H  T        ˆ         dpll_disp_m2_ck@4a4                       ti,divider-clock            	           *            ñ  ¤         5         a        ˆ         dpll_per_ck@48c                   !    ti,am3-dpll-no-gate-j-type-clock            	   	   	         ñ  Œ  p  œ        ˆ         dpll_per_m2_ck@4ac                        ti,divider-clock            	           *            ñ  ¬         5        ˆ         dpll_per_m2_div4_wkupdm_ck                        fixed-factor-clock          	           L           W           ˆ   m      dpll_per_m2_div4_ck                       fixed-factor-clock          	           L           W           ˆ   n      clk_24mhz                         fixed-factor-clock          	           L           W           ˆ         clkdiv32k_ck                          fixed-factor-clock          	           L           W  Ü        ˆ   o      l3_gclk                       fixed-factor-clock          	           L           W           ˆ         pruss_ocp_gclk@530                        ti,mux-clock            	               ñ  0        ˆ   Q      mmu_fck@914                       ti,gate-clock           	           t            ñ  	        ˆ   p      timer1_fck@528                        ti,mux-clock            	   	                             ñ  (        ˆ   5      timer2_fck@508                        ti,mux-clock            	      	                    ñ          ˆ   :      timer3_fck@50c                        ti,mux-clock            	      	                    ñ          ˆ   q      timer4_fck@510                        ti,mux-clock            	      	                    ñ          ˆ   r      timer5_fck@518                        ti,mux-clock            	      	                    ñ          ˆ   s      timer6_fck@51c                        ti,mux-clock            	      	                    ñ          ˆ   t      timer7_fck@504                        ti,mux-clock            	      	                    ñ          ˆ   u      usbotg_fck@47c                        ti,gate-clock           	           t            ñ  |        ˆ   v      dpll_core_m4_div2_ck                          fixed-factor-clock          	           L           W           ˆ         ieee5000_fck@e4                       ti,gate-clock           	           t            ñ   ä        ˆ   w      wdt1_fck@538                          ti,mux-clock            	                       ñ  8        ˆ   x      l4_rtc_gclk                       fixed-factor-clock          	           L           W           ˆ   y      l4hs_gclk                         fixed-factor-clock          	           L           W           ˆ   z      l3s_gclk                          fixed-factor-clock          	           L           W           ˆ   {      l4fw_gclk                         fixed-factor-clock          	           L           W           ˆ   |      l4ls_gclk                         fixed-factor-clock          	           L           W           ˆ   1      sysclk_div_ck                         fixed-factor-clock          	           L           W           ˆ   }      cpsw_125mhz_gclk                          fixed-factor-clock          	           L           W           ˆ   G      cpsw_cpts_rft_clk@520                         ti,mux-clock            	               ñ           ˆ   H      gpio0_dbclk_mux_ck@53c                        ti,mux-clock            	                          ñ  <        ˆ   ~      lcd_gclk@534                          ti,mux-clock            	                  ñ  4         a        ˆ         mmc_clk                       fixed-factor-clock          	           L           W           ˆ         gfx_fclk_clksel_ck@52c                        ti,mux-clock            	              t            ñ  ,        ˆ         gfx_fck_div_ck@52c                        ti,divider-clock            	            ñ  ,        *           ˆ   _      sysclkout_pre_ck@700                          ti,mux-clock            	                        ñ           ˆ         clkout2_div_ck@700                        ti,divider-clock            	           t           *            ñ           ˆ         clkout2_ck@700                        ti,gate-clock           	           t            ñ           ˆ   €         clockdomains            ˆ   �      per-cm@0              ti,omap4-cm          ñ                            +           æ                   ˆ   ‚   l4ls-clkctrl@38           ti,clkctrl        8   ñ   8   ,   l   (   ¬      À      ì          0                      ˆ   7      l3s-clkctrl@1c            ti,clkctrl            ñ         0      h      ø                      ˆ   8      l3-clkctrl@24             ti,clkctrl        (   ñ   $      ”      ¼      Ü      ü                      ˆ   T      l4hs-clkctrl@120              ti,clkctrl           ñ                         ˆ   ƒ      pruss-ocp-clkctrl@e8              ti,clkctrl           ñ   è                      ˆ   O      cpsw-125mhz-clkctrl@0             ti,clkctrl           ñ                          ˆ   F      lcdc-clkctrl@18           ti,clkctrl           ñ                         ˆ   D      clk-24mhz-clkctrl@14c             ti,clkctrl           ñ  L                      ˆ            wkup-cm@400           ti,omap4-cm          ñ                           +           æ                  ˆ   „   l4-wkup-clkctrl@0             ti,clkctrl           ñ          ´   $                   ˆ         l3-aon-clkctrl@14             ti,clkctrl           ñ                         ˆ   …      l4-wkup-aon-clkctrl@b0            ti,clkctrl           ñ   °                      ˆ   †         mpu-cm@600            ti,omap4-cm          ñ                           +           æ                  ˆ   ‡   mpu-clkctrl@0             ti,clkctrl           ñ                          ˆ   ˆ         l4-rtc-cm@800             ti,omap4-cm          ñ                           +           æ                  ˆ   ‰   l4-rtc-clkctrl@0              ti,clkctrl           ñ                          ˆ   6         gfx-l3-cm@900             ti,omap4-cm          ñ  	                         +           æ      	            ˆ   Š   gfx-l3-clkctrl@0              ti,clkctrl           ñ                          ˆ   ]         l4-cefuse-cm@a00              ti,omap4-cm          ñ  
                         +           æ      
            ˆ   ‹   l4-cefuse-clkctrl@0           ti,clkctrl           ñ       $                   ˆ   Œ         prm@c00       !    ti,am3-prm-inst ti,omap-prm-inst             ñ              �           ˆ   P      prm@d00       !    ti,am3-prm-inst ti,omap-prm-inst             ñ              �           ˆ   �      prm@f00       !    ti,am3-prm-inst ti,omap-prm-inst             ñ              �           ˆ   Ž      prm@1100          !    ti,am3-prm-inst ti,omap-prm-inst             ñ              Ž            �           ˆ   ^            target-module@3000            ti,sysc       	  disabled                         +           æ      0          target-module@5000            ti,sysc       	  disabled                         +           æ      P          target-module@7000            ti,sysc-omap2 ti,sysc            ñ  p      p     q           írev sysc syss           ¢           ¯                     ½           	                         
  fck dbclk                        +           æ      p            ˆ   �   gpio@0            ti,omap4-gpio         À  Ê           R             4             ^             G             ‡             l             I                          
             J             Q                         Ö        æ            ò                    ñ               É   `        ˆ   )         target-module@9000            ti,sysc-omap2 ti,sysc            ñ  �P     �T     �X           írev sysc syss           ¢           ¯                     	      ´            fck                      +           æ      �       serial@0              ti,am3352-uart ti,omap3-uart            Ül          ñ               É   H        okay               !          !               tx rx           'default         5   "        ˆ   �         target-module@b000            ti,sysc-omap2 ti,sysc            ñ  °      °     °�           írev sysc syss           ¢          ¯                     ½           	      ¸            fck                      +           æ      °       i2c@0             ti,omap4-i2c                         +             ñ               É   F        okay            'default         5   #         €        ˆ   ‘   tps@24           ñ   $          ti,tps65217          ò                   É                        ?        ˆ   [   charger           ti,tps65217-charger         É               [USB AC          okay          pwrbutton             ti,tps65217-pwrbutton           É           okay          regulators                       +       regulator@0          ñ            kdcdc1         	  €vdds_dpr             �        ˆ   ’      regulator@1          ñ           kdcdc2           €vdd_mpu         £ H        » ŸL         Ó         �        ˆ         regulator@2          ñ           kdcdc3         	  €vdd_core            £ H        » Œ0         Ó         �        ˆ   “      regulator@3          ñ           kldo1            €vio,vrtc,vdds            �        ˆ   ”      regulator@4          ñ           kldo2            €vdd_3v3aux           �        ˆ   •      regulator@5          ñ           kldo3            €vdd_1v8          �        £ w@        » w@        ˆ   –      regulator@6          ñ           kldo4          	  €vdd_3v3a             �        ˆ   —            baseboard_eeprom@50           atmel,24c256             ñ   P                     +           ˆ   ˜   baseboard_data@0             ñ               ˆ   ™         tda19988@70           nxp,tda998x          ñ   p        å   $               õ   $              'default off         5   %        	   &                    $              ˆ   e   ports      port@0     endpoint@0          0   '        ˆ   E               usb-hub@2c          'default         5   (          microchip,usb2512b           ñ   ,        @   )              ˆ   š      barometer@5c            'default         5   *          st,lps331ap-press           L            ñ   \            $        É              ˆ   ›      accelerometer@68            'default         5   +          invensense,mpu6050           ñ   h            )        É            $  \   ÿ                              ÿ        ˆ   œ            target-module@d000            ti,sysc-omap4 ti,sysc            ñ  Ð      Ð         	  írev sysc            ¯                     	      ¼            fck                      +           æ      Ð         à       tscadc@0              ti,am3359-tscadc             ñ               É         	  disabled               !   5       !   9            fifo0 fifo1         ˆ   �   tsc           ti,am3359-tsc         adc         h             ti,am3359-adc           ˆ   ž            target-module@10000           ti,sysc-omap4 ti,sysc            ñ              írev                      +           æ                      scm@0             ti,am3-scm simple-bus            ñ                             +           z           æ                    ˆ   Ÿ   pinmux@800            pinctrl-single           ñ     8        z           ‰            §           'default         5   ,        ˆ       user_leds_s0          0  Ä   T          X         \          `              ˆ   `      pinmux_i2c0_pins            Ä  ˆ   0      Œ   0            ˆ   #      pinmux_i2c2_pins            Ä  x   0     |   0           ˆ   =      pinmux_uart0_pins           Ä  p   0      t                ˆ   "      pinmux_clkout2_pin          Ä  ´               ˆ   ,      cpsw_default          �  Ä                                       $         (         ,         0         4         8         <         @               ˆ   J      cpsw_sleep        �  Ä                                       $         (         ,         0         4         8         <         @               ˆ   K      davinci_mdio_default            Ä  H   0      L               ˆ   M      davinci_mdio_sleep          Ä  H         L               ˆ   N      pinmux_mmc1_pins          T  Ä  `   (      ü   0       ø   0       ô   0       ð   0         0          0            ˆ   ;      pinmux_emmc_pins          x  Ä   €   0      „   0          0         0         0         0         0         0         0         0           ˆ   @      nxp_hdmi_bonelt_pins          ü  Ä  °                     ¤          ¨          ¬          °          ´          ¸          ¼          À          Ä          È          Ì          Ð          Ô          Ø          Ü          à           ä           è           ì                ˆ   %      nxp_hdmi_bonelt_off_pins            Ä  °               ˆ   &      mcasp0_pins       <  Ä  ¬   0      œ         ”         �           l               ˆ   9      usb_hub_ctrl            Ä  D              ˆ   (      pinmux_mpu6050_pins         Ä  h   (           ˆ   +      pinmux_lps3331ap_pins           Ä   h   (           ˆ   *         scm_conf@0            syscon simple-bus            ñ                            +           æ                   ˆ      phy-gmii-sel              ti,am3352-phy-gmii-sel           ñ  P           Ø           ˆ   I      clocks                       +            ˆ       sys_clkin_ck@40                       ti,mux-clock            	   -   .   /   0        t            ñ   @        ˆ   	      adc_tsc_fck                       fixed-factor-clock          	   	        L           W           ˆ   ¡      dcan0_fck                         fixed-factor-clock          	   	        L           W           ˆ   >      dcan1_fck                         fixed-factor-clock          	   	        L           W           ˆ   ?      mcasp0_fck                        fixed-factor-clock          	   	        L           W           ˆ   ¢      mcasp1_fck                        fixed-factor-clock          	   	        L           W           ˆ   £      smartreflex0_fck                          fixed-factor-clock          	   	        L           W           ˆ   ¤      smartreflex1_fck                          fixed-factor-clock          	   	        L           W           ˆ   ¥      sha0_fck                          fixed-factor-clock          	   	        L           W           ˆ   ¦      aes0_fck                          fixed-factor-clock          	   	        L           W           ˆ   §      rng_fck                       fixed-factor-clock          	   	        L           W           ˆ   ¨      ehrpwm0_tbclk@44e10664                        ti,gate-clock           	   1        t             ñ  d        ˆ   A      ehrpwm1_tbclk@44e10664                        ti,gate-clock           	   1        t            ñ  d        ˆ   B      ehrpwm2_tbclk@44e10664                        ti,gate-clock           	   1        t            ñ  d        ˆ   C            control@620           ti,am335x-usb-ctrl-module            ñ        H           íphy_ctrl wakeup         ˆ   X      wkup_m3_ipc@1324              ti,am3352-wkup-m3-ipc            ñ  $   $        É   N        ã   2        ì   3   4        óam335x-bone-scale-data.bin          ˆ   ©      dma-router@f90            ti,am335x-edma-crossbar          ñ  �   @                                  !        ˆ   ª      clockdomains            ˆ   «            target-module@31000           ti,sysc-omap2-timer ti,sysc          ñ                     írev sysc syss           ¢          ¯                  ½           	      Ä            fck                      +           æ                  (         <        ˆ   ¬   timer@0           ti,am335x-timer-1ms          ñ               É   C         G        	   5        fck         V   5        f   	        ˆ   ­         target-module@33000           ti,sysc       	  disabled                         +           æ     0          target-module@35000           ti,sysc-omap2 ti,sysc            ñ P     P    P           írev sysc syss           ¢   "        ¯                     ½           	      Ô            fck                      +           æ     P       wdt@0             ti,omap3-wdt             ñ               É   [        ˆ   ®         target-module@37000           ti,sysc       	  disabled                         +           æ     p          target-module@39000           ti,sysc       	  disabled                         +           æ     �          target-module@3e000           ti,sysc-omap4-simple ti,sysc             ñ àt    àx         	  írev sysc            ¯                     	   6                fck                      +           æ     à       rtc@0             ti,am3352-rtc ti,da830-rtc           ñ               É   K   L        	                      ext-clk int-clk          }        ˆ   ¯         target-module@40000           ti,sysc       	  disabled                         +           æ                      interconnect@48000000             ti,am33xx-l4-per simple-bus       0   ñH      H     H     H     H     H             íap la ia0 ia1 ia2 ia3                        +         H  æ    H         H         H       0  H0     F   F    @  F@  F@   @          ˆ   °   segment@0             simple-bus                       +        ˆ  æ                                                          €   €      �   �     `  `     p  p              0  0     @  @     P  P              °  °     €  €               @  @     P  P     À  À      à  à                              0  0     @  @     P  P     `  `     p  p     €  €     �  �     À  À     Ð  Ð                                                 	   	      
   
                                        °  °     €  €     �  �     À  À     Ð  Ð              °  °    F   F    @  F@  F@   @     target-module@8000            ti,sysc       	  disabled                         +           æ      €          target-module@14000           ti,sysc       	  disabled                         +           æ     @          target-module@16000           ti,sysc       	  disabled                         +           æ     `          target-module@22000           ti,sysc-omap2 ti,sysc            ñ  P     T     X           írev sysc syss           ¢           ¯                     	   7   4            fck                      +           æ             serial@0              ti,am3352-uart ti,omap3-uart            Ül          ñ               É   I      	  disabled               !          !               tx rx           ˆ   ±         target-module@24000           ti,sysc-omap2 ti,sysc            ñ @P    @T    @X           írev sysc syss           ¢           ¯                     	   7   8            fck                      +           æ     @       serial@0              ti,am3352-uart ti,omap3-uart            Ül          ñ               É   J      	  disabled               !          !               tx rx           ˆ   ²         target-module@2a000           ti,sysc-omap2 ti,sysc            ñ             �           írev sysc syss           ¢          ¯                     ½           	   7               fck                      +           æ             i2c@0             ti,omap4-i2c                         +             ñ               É   G      	  disabled            ˆ   ³         target-module@30000           ti,sysc-omap2 ti,sysc            ñ                      írev sysc syss           ¢          ¯                  ½           	   7               fck                      +           æ             spi@0             ti,omap4-mcspi                       +             ñ               É   A        •         0     !          !          !          !               tx0 rx0 tx1 rx1       	  disabled            ˆ   ´         target-module@38000           ti,sysc-omap4-simple ti,sysc             ñ €     €         	  írev sysc            ¯                  	   8               fck                      +           æ     €     F   F    @     mcasp@0           ti,am33xx-mcasp-audio            ñ        F    @          ímpu dat         É   P   Q        [tx rx           okay               !         !   	           tx rx                       'default         5   9        £            «           µ                       À            Ë            ˆ   c         target-module@3c000           ti,sysc-omap4-simple ti,sysc             ñ À     À         	  írev sysc            ¯                  	   8   L            fck                      +           æ     À     F@  F@   @     mcasp@0           ti,am33xx-mcasp-audio            ñ        F@   @          ímpu dat         É   R   S        [tx rx         	  disabled               !   
      !              tx rx           ˆ   µ         target-module@40000           ti,sysc-omap4-timer ti,sysc          ñ                        írev sysc syss           ¢           ¯                     	   7   H            fck                      +           æ                   (         <        ˆ   ¶   timer@0           ti,am335x-timer          ñ               É   D        	   :        fck         V   :        f   	        ˆ   ·         target-module@42000           ti,sysc-omap4-timer ti,sysc          ñ                        írev sysc syss           ¢           ¯                     	   7   L            fck                      +           æ             timer@0           ti,am335x-timer          ñ               É   E        ˆ   ¸         target-module@44000           ti,sysc-omap4-timer ti,sysc          ñ @     @    @           írev sysc syss           ¢           ¯                     	   7   P            fck                      +           æ     @       timer@0           ti,am335x-timer          ñ               É   \         Ö        ˆ   ¹         target-module@46000           ti,sysc-omap4-timer ti,sysc          ñ `     `    `           írev sysc syss           ¢           ¯                     	   7   ´            fck                      +           æ     `       timer@0           ti,am335x-timer          ñ               É   ]         Ö        ˆ   º         target-module@48000           ti,sysc-omap4-timer ti,sysc          ñ €     €    €           írev sysc syss           ¢           ¯                     	   7   ¸            fck                      +           æ     €       timer@0           ti,am335x-timer          ñ               É   ^         Ö        ˆ   »         target-module@4a000           ti,sysc-omap4-timer ti,sysc          ñ                        írev sysc syss           ¢           ¯                     	   7   D            fck                      +           æ             timer@0           ti,am335x-timer          ñ               É   _         Ö        ˆ   ¼         target-module@4c000           ti,sysc-omap2 ti,sysc            ñ À     À    Á           írev sysc syss           ¢           ¯                     ½           	   7   t       7   t         
  fck dbclk                        +           æ     À       gpio@0            ti,omap4-gpio         @  Ê                         Z                                      Ö        æ            ò                    ñ               É   b        ˆ   $         target-module@50000           ti,sysc       	  disabled                         +           æ                 target-module@60000           ti,sysc-omap2 ti,sysc            ñ ü                   írev sysc syss           ¢          ¯                  ½           	   7               fck                      +           æ             mmc@0             ti,am335-sdhci           ã           !          !               tx rx           É   @         ñ               okay            ú           'default         5   ;           )                 <        ˆ   ½         target-module@80000           ti,sysc-omap2 ti,sysc            ñ                        írev sysc syss           ¢          ¯                  ½           	   7               fck                      +           æ             elm@0             ti,am3352-elm            ñ                É         	  disabled            ˆ   ¾         target-module@a0000           ti,sysc       	  disabled                         +           æ     
           target-module@c8000           ti,sysc-omap4 ti,sysc            ñ €     €         	  írev sysc            ¢           ¯                  	   7   Ø            fck                      +           æ     €       mailbox@0             ti,omap4-mailbox             ñ               É   M                   %           7           ˆ   3   mbox-wkup-m3             I        \                    g                   ˆ   4            target-module@ca000           ti,sysc-omap2 ti,sysc            ñ                        írev sysc syss           ¢          ¯                  ½           	   7   Ô            fck                      +           æ             spinlock@0            ti,omap4-hwspinlock          ñ               r           ˆ   ¿         target-module@cc000           ti,sysc       	  disabled                         +           æ     À             segment@100000            simple-bus                       +        h  æ À  À     Ð  Ð     à  à     ð  ð     	À  À     	Ð  Ð     
`  `     
p  p     
€  €     
�  �     
         
°  °     
À  À     
Ð  Ð     
à  à     
ð  ð                       À  À      à  à                          €  €     �  �     
         
       
         
0  0     
@  @     
P  P       target-module@8c000           ti,sysc       	  disabled                         +           æ     À          target-module@8e000           ti,sysc       	  disabled                         +           æ     à          target-module@9c000           ti,sysc-omap2 ti,sysc            ñ 	À     	À    	À�           írev sysc syss           ¢          ¯                     ½           	   7               fck                      +           æ     	À       i2c@0             ti,omap4-i2c                         +             ñ               É           okay            'default         5   =         †         ˆ   À   cape_eeprom0@54           atmel,24c256             ñ   T                     +           ˆ   Á   cape_data@0          ñ               ˆ   Â         cape_eeprom1@55           atmel,24c256             ñ   U                     +           ˆ   Ã   cape_data@0          ñ               ˆ   Ä         cape_eeprom2@56           atmel,24c256             ñ   V                     +           ˆ   Å   cape_data@0          ñ               ˆ   Æ         cape_eeprom3@57           atmel,24c256             ñ   W                     +           ˆ   Ç   cape_data@0          ñ               ˆ   È               target-module@a0000           ti,sysc-omap2 ti,sysc            ñ 
      
    
           írev sysc syss           ¢          ¯                  ½           	   7               fck                      +           æ     
        spi@0             ti,omap4-mcspi                       +             ñ               É   }        •         0     !   *       !   +       !   ,       !   -            tx0 rx0 tx1 rx1       	  disabled            ˆ   É         target-module@a2000           ti,sysc       	  disabled                         +           æ     
           target-module@a4000           ti,sysc       	  disabled                         +           æ     
@          target-module@a6000           ti,sysc-omap2 ti,sysc            ñ 
`P    
`T    
`X           írev sysc syss           ¢           ¯                     	   7   <            fck                      +           æ     
`       serial@0              ti,am3352-uart ti,omap3-uart            Ül          ñ               É   ,      	  disabled            ˆ   Ê         target-module@a8000           ti,sysc-omap2 ti,sysc            ñ 
€P    
€T    
€X           írev sysc syss           ¢           ¯                     	   7   @            fck                      +           æ     
€       serial@0              ti,am3352-uart ti,omap3-uart            Ül          ñ               É   -      	  disabled            ˆ   Ë         target-module@aa000           ti,sysc-omap2 ti,sysc            ñ 
 P    
 T    
 X           írev sysc syss           ¢           ¯                     	   7                fck                      +           æ     
        serial@0              ti,am3352-uart ti,omap3-uart            Ül          ñ               É   .      	  disabled            ˆ   Ì         target-module@ac000           ti,sysc-omap2 ti,sysc            ñ 
À     
À    
Á           írev sysc syss           ¢           ¯                     ½           	   7   x       7   x         
  fck dbclk                        +           æ     
À       gpio@0            ti,omap4-gpio         0  Ê           "             M             8   
         Ö        æ            ò                    ñ               É            ˆ   Í         target-module@ae000           ti,sysc-omap2 ti,sysc            ñ 
à     
à    
á           írev sysc syss           ¢           ¯                     ½           	   7   |       7   |         
  fck dbclk                        +           æ     
à            ˆ   Î   gpio@0            ti,omap4-gpio         P  Ê           B             b             K             �             d            Ö        æ            ò                    ñ               É   >        ˆ   Ï         target-module@b0000           ti,sysc       	  disabled                         +           æ                target-module@cc000           ti,sysc-omap4 ti,sysc            ñ À            írev         	   7   ˆ       >        fck osc                      +           æ     À        can@0             ti,am3352-d_can          ñ                	   >        fck         €     D            É   4      	  disabled            ˆ   Ð         target-module@d0000           ti,sysc-omap4 ti,sysc            ñ              írev         	   7   Œ       ?        fck osc                      +           æ              can@0             ti,am3352-d_can          ñ                	   ?        fck         €     D           É   7      	  disabled            ˆ   Ñ         target-module@d8000           ti,sysc-omap2 ti,sysc            ñ ‚ü    �    �           írev sysc syss           ¢          ¯                  ½           	   7   ¼            fck                      +           æ     €       mmc@0             ti,am335-sdhci           ã           !          !               tx rx           É            ñ               okay               <        'default         5   @        ú            �        ˆ   Ò            segment@200000            simple-bus                       +         segment@300000            simple-bus                       +          æ     0         0         0       0  00      @  0@      P  0P      à  0à      ð  0ð     €  1€   @  À  1À        1          1      P  1P     `  1`     p  1p     0  10     @  1@        2        2        2      0  20     @  2@     P  2P       target-module@0           ti,sysc-omap4 ti,sysc            ñ                   	  írev sysc            �                     ¯                     	   7   œ            fck                      +           æ              epwmss@0              ti,am33xx-pwmss          ñ                            +         	  disabled            æ                   ˆ   Ó   pwm@100           ti,am3352-ecap          «            ñ      €        	   1        fck       	  disabled            ˆ   Ô      counter@180           ti,am3352-eqep           ñ  €   €        	   1      
  sysclkout           É   O      	  disabled            ˆ   Õ      pwm@200           ti,am3352-ehrpwm            «            ñ      €        	   A   1      
  tbclk fck         	  disabled            ˆ   Ö            target-module@2000            ti,sysc-omap4 ti,sysc            ñ                   	  írev sysc            �                     ¯                     	   7   ”            fck                      +           æ              epwmss@0              ti,am33xx-pwmss          ñ                            +         	  disabled            æ                   ˆ   ×   pwm@100           ti,am3352-ecap          «            ñ      €        	   1        fck       	  disabled            ˆ   Ø      counter@180           ti,am3352-eqep           ñ  €   €        	   1      
  sysclkout           É   X      	  disabled            ˆ   Ù      pwm@200           ti,am3352-ehrpwm            «            ñ      €        	   B   1      
  tbclk fck         	  disabled            ˆ   Ú            target-module@4000            ti,sysc-omap4 ti,sysc            ñ  @      @         	  írev sysc            �                     ¯                     	   7                fck                      +           æ      @       epwmss@0              ti,am33xx-pwmss          ñ                            +         	  disabled            æ                   ˆ   Û   pwm@100           ti,am3352-ecap          «            ñ      €        	   1        fck       	  disabled            ˆ   Ü      counter@180           ti,am3352-eqep           ñ  €   €        	   1      
  sysclkout           É   Y      	  disabled            ˆ   Ý      pwm@200           ti,am3352-ehrpwm            «            ñ      €        	   C   1      
  tbclk fck         	  disabled            ˆ   Þ            target-module@e000            ti,sysc-omap4 ti,sysc            ñ  à      àT         	  írev sysc            �                  ¯                  	   D                fck                      +           æ      à       lcdc@0            ti,am33xx-tilcdc             ñ               É   $        okay          	  ¶straight            ˆ   ß   port       endpoint@0          0   E        ˆ   '               target-module@10000           ti,sysc-omap2 ti,sysc            ñ à    ä         	  írev sysc            ¢           ¯               	   7   X            fck                      +           æ              rng@0             ti,omap4-rng             ñ                É   o        ˆ   à         target-module@13000           ti,sysc       	  disabled                         +           æ     0          target-module@15000           ti,sysc       	  disabled                         +           æ     P        `          target-module@18000           ti,sysc       	  disabled                         +           æ     €   @       target-module@20000           ti,sysc       	  disabled                         +           æ                target-module@22000           ti,sysc       	  disabled                         +           æ                target-module@24000           ti,sysc       	  disabled                         +           æ     @                interconnect@47c00000             ti,am33xx-l4-fw simple-bus           ñGÀ     GÀ    GÀ          
  íap la ia0                        +           æ    GÀ             ˆ   á   segment@0             simple-bus                       +        Ô  æ                               À   À      Ð   Ð      à   à      ð   ð                              °  °     @  @     P  P     `  `     p  p                     €  €     �  �              °  °     à  à     ð  ð     À  À              `  `     p  p     @  @     P  P     €  €     �  �              0  0     Ð  Ð                     0  0     @  @     P  P       target-module@c000            ti,sysc       	  disabled                         +           æ      À          target-module@e000            ti,sysc       	  disabled                         +           æ      à          target-module@10000           ti,sysc       	  disabled                         +           æ                target-module@14000           ti,sysc       	  disabled                         +           æ     @          target-module@1a000           ti,sysc       	  disabled                         +           æ                target-module@24000           ti,sysc       	  disabled                         +           æ     @          target-module@26000           ti,sysc       	  disabled                         +           æ     `          target-module@28000           ti,sysc       	  disabled                         +           æ     €          target-module@30000           ti,sysc       	  disabled                         +           æ                target-module@32000           ti,sysc       	  disabled                         +           æ                target-module@38000           ti,sysc       	  disabled                         +           æ     €          target-module@3a000           ti,sysc       	  disabled                         +           æ                target-module@3c000           ti,sysc       	  disabled                         +           æ     À          target-module@3e000           ti,sysc       	  disabled                         +           æ     à          target-module@40000           ti,sysc       	  disabled                         +           æ                target-module@42000           ti,sysc       	  disabled                         +           æ                target-module@44000           ti,sysc       	  disabled                         +           æ     @          target-module@46000           ti,sysc       	  disabled                         +           æ     `                interconnect@4a000000             ti,am33xx-l4-fast simple-bus             ñJ      J     J           
  íap la ia0                        +           æ    J              ˆ   â   segment@0             simple-bus                       +         „  æ                                     €  €  €                                  (   (      0   0      8   8        target-module@100000              ti,sysc-omap4-simple ti,sysc             ñ                     írev sysc syss           ¢            �               ¯               ½           	   F               fck                      +           æ         €    ethernet@0            ti,am335x-cpsw ti,cpsw          	   G   H      	  fck cpts            Ê           Ù           å            ñ            ý                       €           !            ñ                                  +           É   (   )   *   +        æ          €         �         	  disabled            ˆ   ã   mdio@1000             ti,cpsw-mdio ti,davinci_mdio            	   F               fck                      +            2 B@         ñ            	  disabled            ˆ   ä      slave@200           ;                G   I              ˆ   å      slave@300           ;                G   I              ˆ   æ         switch@0          %    ti,am335x-cpsw-switch ti,cpsw-switch             ñ      @         æ          @         	   G        fck                      +           �           okay            É   (   )   *   +        [rx_thresh rx tx misc            'default sleep           5   J        	   K        ˆ   ç   ethernet-ports                       +       port@1           ñ           Lport1           ;                G   I              R   L      	  ]rgmii-id            f           ˆ   è      port@2           ñ           Lport2           ;                G   I            	  disabled            ˆ   é         mdio@1000             ti,cpsw-mdio ti,davinci_mdio            	   G        fck                      +            2 B@         ñ              'default sleep           5   M        	   N        ˆ   ê   ethernet-phy@0           ñ            ˆ   L         cpts            	   H        cpts                target-module@180000              ti,sysc       	  disabled                         +           æ                target-module@200000              ti,sysc       	  disabled                         +           æ                 target-module@300000              ti,sysc-pruss ti,sysc            ñ 2`     2`         	  írev sysc            ¢   0        �                  ¯                  	   O                fck         x   P           rstctrl                      +           æ     0             okay            ˆ   ë   pruss@0           ti,am3356-pruss          ñ                            +            æ        ˆ   ì   memories@0           ñ                     0         ídram0 dram1 shrdram2            ˆ   í      cfg@26000             ti,pruss-cfg syscon          ñ `                          +           æ     `             ˆ   î   clocks                       +       iepclk-mux@30            ñ   0                    	      Q        ˆ   S            serial@28000              ti,pruss-uart            ñ €    8        	               R      	  disabled            ˆ   ï      iep@2e000             ti,am3356-icss-iep           ñ à           	   S        ˆ   ð      ecap@30000            ti,pruss-ecap            ñ      `        ˆ   ñ      mii-rt@32000              ti,pruss-mii syscon          ñ      X        ˆ   ò      interrupt-controller@20000            ti,pruss-intc            ñ                É                              X  [host_intr0 host_intr1 host_intr2 host_intr3 host_intr4 host_intr5 host_intr6 host_intr7          ò                   ˆ   R      pru@34000             ti,am3356-pru            ñ @            $            íiram control debug          ‹am335x-pru0-fw              R        É                 [vring           ˆ   ó      pru@38000             ti,am3356-pru            ñ €      @     D            íiram control debug          ‹am335x-pru1-fw              R        É                 [vring           ˆ   ô      mdio@32400            ti,davinci_mdio          ñ $    �        	           fck         2 B@                     +          	  disabled            ˆ   õ                  interconnect@4b140000             ti,am33xx-l4-mpuss simple-bus            ñKD    KH            íla ap                        +           æ    K    €         ˆ   ö   segment@0             simple-bus                       +         `  æ  H   H                          @   @      P   P                 0   0                target-module@0           ti,sysc       	  disabled                         +         $  æ                                     target-module@3000            ti,sysc       	  disabled                         +           æ      0                interrupt-controller@48200000             ti,am33xx-intc           ò                    ñH              ˆ         target-module@49000000            ti,sysc-omap4 ti,sysc            ñI              írev         	   T   ˜            fck                      +           æ    I         dma@0             ti,edma3-tpcc            ñ             	  íedma3_cc            É               '  [edma3_ccint edma3_mperr edma3_ccerrint             @                   ™   U      V      W            ¢              ˆ   !         target-module@49800000            ti,sysc-omap4 ti,sysc            ñI€     I€          	  írev sysc            ¢           �            ¯               	   T                fck                      +           æ    I€        dma@0             ti,edma3-tptc            ñ               É   p        [edma3_tcerrint          ˆ   U         target-module@49900000            ti,sysc-omap4 ti,sysc            ñI�     I�          	  írev sysc            ¢           �            ¯               	   T   Ø            fck                      +           æ    I�        dma@0             ti,edma3-tptc            ñ               É   q        [edma3_tcerrint          ˆ   V         target-module@49a00000            ti,sysc-omap4 ti,sysc            ñI      I           	  írev sysc            ¢           �            ¯               	   T   Ü            fck                      +           æ    I         dma@0             ti,edma3-tptc            ñ               É   r        [edma3_tcerrint          ˆ   W         target-module@47810000            ti,sysc-omap2 ti,sysc            ñG�ü   G�   G�           írev sysc syss           ¢          ¯                  ½           	   8   Ü            fck                      +           æ    G�        mmc@0             ti,am335-sdhci           ã        É            ñ             	  disabled            ˆ   ÷         target-module@47400000            ti,sysc-omap4 ti,sysc            ñG@     G@          	  írev sysc            ¢           �                  ¯                     	   8                fck                      +           æ    G@    €         ˆ   ø   usb-phy@1300              ti,am335x-usb-phy            ñ              íphy         º   X        Ø            ˆ   Y      usb@1400              ti,musb-am33xx           ñ                    ímc control          É           [mc vbus         Æperipheral          Î           à           ï           ÿ  ô        G   Y     h     Z           Z          Z          Z          Z          Z          Z          Z          Z          Z   	       Z   
       Z          Z          Z          Z          Z          Z         Z         Z         Z         Z         Z         Z         Z         Z   	      Z   
      Z         Z         Z         Z            „  rx1 rx2 rx3 rx4 rx5 rx6 rx7 rx8 rx9 rx10 rx11 rx12 rx13 rx14 rx15 tx1 tx2 tx3 tx4 tx5 tx6 tx7 tx8 tx9 tx10 tx11 tx12 tx13 tx14 tx15         õ         [            ˆ   ù      usb-phy@1b00              ti,am335x-usb-phy            ñ              íphy         º   X        Ø            ˆ   \      usb@1800              ti,musb-am33xx           ñ                    ímc control          É           [mc          Æhost            Î           à           ï           ÿ  ô        G   \     h     Z          Z          Z          Z          Z          Z          Z          Z          Z          Z          Z          Z          Z          Z          Z          Z         Z         Z         Z         Z         Z         Z         Z         Z         Z         Z         Z         Z         Z         Z            „  rx1 rx2 rx3 rx4 rx5 rx6 rx7 rx8 rx9 rx10 rx11 rx12 rx13 rx14 rx15 tx1 tx2 tx3 tx4 tx5 tx6 tx7 tx8 tx9 tx10 tx11 tx12 tx13 tx14 tx15         ˆ   ú      dma-controller@2000           ti,am3359-cppi41              ñ                0      @   @       #  íglue controller scheduler queuemgr          É           [glue                                             ˆ   Z         sram@40300000         
    mmio-sram            ñ@0             æ    @0                          +           ˆ   û   pm-code-sram@0            ti,sram          ñ                (        ˆ         pm-data-sram@1000             ti,sram          ñ               5        ˆ            emif@4c000000             ti,emif-am3352           ñL              Ôemif            É   e        á               <        ˆ   ü      gpmc@50000000             ti,am3352-gpmc          Ôgpmc             :         ñP               É   d           !   4            rxtx            M           Y                        +            ò                    Ö        æ         	  disabled            ˆ   ý      target-module@53100000            ti,sysc-omap3-sham ti,sysc           ñS    S   S           írev sysc syss           ¢           ¯                  ½           	   T   |            fck                      +           æ    S             ˆ   þ   sham@0            ti,omap4-sham            ñ               É   m           !   $            rx          okay            ˆ   ÿ         target-module@53500000            ti,sysc-omap2 ti,sysc            ñSP €   SP „   SP ˆ           írev sysc syss           ¢           ¯                     ½           	   T   p            fck                      +           æ    SP             ˆ      aes@0             ti,omap4-aes             ñ                É   g           !          !               tx rx           okay            ˆ           target-module@56000000            ti,sysc-omap4 ti,sysc            ñV þ    V þ         	  írev sysc            �                  ¯                  	   ]               fck         k   ^        x   ^            rstctrl                      +           æ    V         gpu@0             ti,am3352-sgx530 img,sgx530          ñ               É   %        	   _        fclk            ˆ              memory@80000000          åmemory           ñ€             leds            'default         5   `      
    gpio-leds      led2            Lbeaglebone:green:heartbeat          ï   $             
  yheartbeat           �off       led3            Lbeaglebone:green:mmc0           ï   $               ymmc0            �off       led4            Lbeaglebone:green:usr2           ï   $               ycpu0            �off       led5            Lbeaglebone:green:usr3           ï   $               ymmc1            �off          fixedregulator0           regulator-fixed         €vmmcsd_fixed            £ 2Z         » 2Z         ˆ   <      clk_mcasp0_fixed                          fixed-clock         w          ˆ   a      clk_mcasp0                        gpio-gate-clock         	   a        �   $               ˆ   d      sound             simple-audio-card           ªTI BeagleBone Black         Ái2s         Ú   b        ü   b   simple-audio-card,cpu           	   c        	   d        ˆ   b      simple-audio-card,codec         	   e         __symbols__         	%/cpus/idle-states/mpu_gate          	./opp-table          	=/ocp            	A/ocp/interconnect@44c00000        *  	I/ocp/interconnect@44c00000/wkup_m3@100000         A  	Q/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0          H  	V/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks       U  	b/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clk_32768_ck          U  	o/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clk_rc32k_ck          Y  	|/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/virt_19200000_ck          Y  	�/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/virt_24000000_ck          Y  	ž/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/virt_25000000_ck          Y  	¯/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/virt_26000000_ck          R  	À/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/tclkin_ck         Y  	Ê/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/dpll_core_ck@490          X  	×/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/dpll_core_x2_ck       \  	ç/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/dpll_core_m4_ck@480       \  	÷/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/dpll_core_m5_ck@484       \  
/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/dpll_core_m6_ck@4d8       X  
/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/dpll_mpu_ck@488       [  
#/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/dpll_mpu_m2_ck@4a8        X  
2/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/dpll_ddr_ck@494       [  
>/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/dpll_ddr_m2_ck@4a0        \  
M/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/dpll_ddr_m2_div2_ck       Y  
a/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/dpll_disp_ck@498          \  
n/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/dpll_disp_m2_ck@4a4       X  
~/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/dpll_per_ck@48c       [  
Š/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/dpll_per_m2_ck@4ac        c  
™/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/dpll_per_m2_div4_wkupdm_ck        \  
´/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/dpll_per_m2_div4_ck       R  
È/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clk_24mhz         U  
Ò/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clkdiv32k_ck          P  
ß/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/l3_gclk       [  
ç/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/pruss_ocp_gclk@530        T  
ö/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/mmu_fck@914       W  
þ/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/timer1_fck@528        W  	/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/timer2_fck@508        W  /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/timer3_fck@50c        W  /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/timer4_fck@510        W  */ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/timer5_fck@518        W  5/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/timer6_fck@51c        W  @/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/timer7_fck@504        W  K/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/usbotg_fck@47c        ]  V/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/dpll_core_m4_div2_ck          X  k/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/ieee5000_fck@e4       U  x/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/wdt1_fck@538          T  �/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/l4_rtc_gclk       R  �/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/l4hs_gclk         Q  —/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/l3s_gclk          R   /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/l4fw_gclk         R  ª/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/l4ls_gclk         V  ´/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/sysclk_div_ck         Y  Â/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/cpsw_125mhz_gclk          ^  Ó/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/cpsw_cpts_rft_clk@520         _  å/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/gpio0_dbclk_mux_ck@53c        U  ø/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/lcd_gclk@534          P  /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/mmc_clk       _  	/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/gfx_fclk_clksel_ck@52c        [  /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/gfx_fck_div_ck@52c        ]  +/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/sysclkout_pre_ck@700          [  </ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clkout2_div_ck@700        W  K/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clkout2_ck@700        N  V/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clockdomains         J  h/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/per-cm@0         Z  o/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/per-cm@0/l4ls-clkctrl@38         Y  |/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/per-cm@0/l3s-clkctrl@1c          X  ˆ/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/per-cm@0/l3-clkctrl@24       [  “/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/per-cm@0/l4hs-clkctrl@120        _   /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/per-cm@0/pruss-ocp-clkctrl@e8        `  ²/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/per-cm@0/cpsw-125mhz-clkctrl@0       Z  Æ/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/per-cm@0/lcdc-clkctrl@18         `  Ó/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/per-cm@0/clk-24mhz-clkctrl@14c       M  å/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/wkup-cm@400          _  í/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/wkup-cm@400/l4-wkup-clkctrl@0        _  ý/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/wkup-cm@400/l3-aon-clkctrl@14        d  /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/wkup-cm@400/l4-wkup-aon-clkctrl@b0       L   /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/mpu-cm@600       Z  '/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/mpu-cm@600/mpu-clkctrl@0         O  3/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/l4-rtc-cm@800        `  =/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/l4-rtc-cm@800/l4-rtc-clkctrl@0       O  L/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/gfx-l3-cm@900        `  V/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/gfx-l3-cm@900/gfx-l3-clkctrl@0       R  e/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/l4-cefuse-cm@a00         f  r/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/l4-cefuse-cm@a00/l4-cefuse-clkctrl@0         I  „/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@c00          I  Œ/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@d00          I  •/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@f00          J   /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@1100         =  ¨/ocp/interconnect@44c00000/segment@200000/target-module@7000          D  µ/ocp/interconnect@44c00000/segment@200000/target-module@7000/gpio@0       F  »/ocp/interconnect@44c00000/segment@200000/target-module@9000/serial@0         C   I/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0        J  Á/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tps@24         a  Å/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tps@24/regulators/regulator@0          a  Ï/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tps@24/regulators/regulator@1          a  Ù/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tps@24/regulators/regulator@2          a  ã/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tps@24/regulators/regulator@3          a  ì/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tps@24/regulators/regulator@4          a  õ/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tps@24/regulators/regulator@5          a  þ/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tps@24/regulators/regulator@6          W  /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/baseboard_eeprom@50        h  /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/baseboard_eeprom@50/baseboard_data@0       O  '/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tda19988@70        g  0/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tda19988@70/ports/port@0/endpoint@0        N  7/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/usb-hub@2c         P  @/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/barometer@5c       T  I/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/accelerometer@68       F  Q/ocp/interconnect@44c00000/segment@200000/target-module@d000/tscadc@0         J  X/ocp/interconnect@44c00000/segment@200000/target-module@d000/tscadc@0/adc         D  c/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0       O  g/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800        \  u/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/user_leds_s0       `  ‚/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/pinmux_i2c0_pins       `  Œ/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/pinmux_i2c2_pins       a  –/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/pinmux_uart0_pins          b  ¡/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/pinmux_clkout2_pin         \  ­/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/cpsw_default       Z  º/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/cpsw_sleep         d  Å/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/davinci_mdio_default       b  Ú/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/davinci_mdio_sleep         `  í/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/pinmux_mmc1_pins       `  ÷/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/pinmux_emmc_pins       d  /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/nxp_hdmi_bonelt_pins       h  /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/nxp_hdmi_bonelt_off_pins       [  //ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/mcasp0_pins        \  ;/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/usb_hub_ctrl       c  H/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/pinmux_mpu6050_pins        e  U/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/pinmux_lps3331ap_pins          O  d/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0        \  m/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/phy-gmii-sel       V  z/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks         f  …/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/sys_clkin_ck@40         b  ’/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/adc_tsc_fck         `  ž/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/dcan0_fck       `  ¨/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/dcan1_fck       a  ²/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/mcasp0_fck          a  ½/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/mcasp1_fck          g  È/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/smartreflex0_fck        g  Ù/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/smartreflex1_fck        _  ê/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/sha0_fck        _  ó/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/aes0_fck        ^  ü/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/rng_fck         m  /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/ehrpwm0_tbclk@44e10664          m  /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/ehrpwm1_tbclk@44e10664          m   /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/ehrpwm2_tbclk@44e10664          P  ./ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/control@620       U  ;/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/wkup_m3_ipc@1324          S  G/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/dma-router@f90        Q  Q/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/clockdomains          >  b/ocp/interconnect@44c00000/segment@200000/target-module@31000         F  p/ocp/interconnect@44c00000/segment@200000/target-module@31000/timer@0         D  w/ocp/interconnect@44c00000/segment@200000/target-module@35000/wdt@0       D  |/ocp/interconnect@44c00000/segment@200000/target-module@3e000/rtc@0         €/ocp/interconnect@48000000        B  ‡/ocp/interconnect@48000000/segment@0/target-module@22000/serial@0         B  �/ocp/interconnect@48000000/segment@0/target-module@24000/serial@0         ?   N/ocp/interconnect@48000000/segment@0/target-module@2a000/i2c@0        ?   ¾/ocp/interconnect@48000000/segment@0/target-module@30000/spi@0        A  “/ocp/interconnect@48000000/segment@0/target-module@38000/mcasp@0          A  š/ocp/interconnect@48000000/segment@0/target-module@3c000/mcasp@0          9  ¡/ocp/interconnect@48000000/segment@0/target-module@40000          A  ¯/ocp/interconnect@48000000/segment@0/target-module@40000/timer@0          A  ¶/ocp/interconnect@48000000/segment@0/target-module@42000/timer@0          A  ½/ocp/interconnect@48000000/segment@0/target-module@44000/timer@0          A  Ä/ocp/interconnect@48000000/segment@0/target-module@46000/timer@0          A  Ë/ocp/interconnect@48000000/segment@0/target-module@48000/timer@0          A  Ò/ocp/interconnect@48000000/segment@0/target-module@4a000/timer@0          @  Ù/ocp/interconnect@48000000/segment@0/target-module@4c000/gpio@0       ?   Í/ocp/interconnect@48000000/segment@0/target-module@60000/mmc@0        ?  ß/ocp/interconnect@48000000/segment@0/target-module@80000/elm@0        C  ã/ocp/interconnect@48000000/segment@0/target-module@c8000/mailbox@0        P  ë/ocp/interconnect@48000000/segment@0/target-module@c8000/mailbox@0/mbox-wkup-m3       D  ÷/ocp/interconnect@48000000/segment@0/target-module@ca000/spinlock@0       D   S/ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0       T  /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom0@54       `  /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom0@54/cape_data@0       T  /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom1@55       `  '/ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom1@55/cape_data@0       T  2/ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom2@56       `  ?/ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom2@56/cape_data@0       T  J/ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom3@57       `  W/ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom3@57/cape_data@0       D   Ã/ocp/interconnect@48000000/segment@100000/target-module@a0000/spi@0       G  b/ocp/interconnect@48000000/segment@100000/target-module@a6000/serial@0        G  h/ocp/interconnect@48000000/segment@100000/target-module@a8000/serial@0        G  n/ocp/interconnect@48000000/segment@100000/target-module@aa000/serial@0        E  t/ocp/interconnect@48000000/segment@100000/target-module@ac000/gpio@0          >  z/ocp/interconnect@48000000/segment@100000/target-module@ae000         E  ‡/ocp/interconnect@48000000/segment@100000/target-module@ae000/gpio@0          D  �/ocp/interconnect@48000000/segment@100000/target-module@cc000/can@0       D  “/ocp/interconnect@48000000/segment@100000/target-module@d0000/can@0       D   Ò/ocp/interconnect@48000000/segment@100000/target-module@d8000/mmc@0       C  ™/ocp/interconnect@48000000/segment@300000/target-module@0/epwmss@0        K  ¡/ocp/interconnect@48000000/segment@300000/target-module@0/epwmss@0/pwm@100        O  §/ocp/interconnect@48000000/segment@300000/target-module@0/epwmss@0/counter@180        K  ­/ocp/interconnect@48000000/segment@300000/target-module@0/epwmss@0/pwm@200        F  µ/ocp/interconnect@48000000/segment@300000/target-module@2000/epwmss@0         N  ½/ocp/interconnect@48000000/segment@300000/target-module@2000/epwmss@0/pwm@100         R  Ã/ocp/interconnect@48000000/segment@300000/target-module@2000/epwmss@0/counter@180         N  É/ocp/interconnect@48000000/segment@300000/target-module@2000/epwmss@0/pwm@200         F  Ñ/ocp/interconnect@48000000/segment@300000/target-module@4000/epwmss@0         N  Ù/ocp/interconnect@48000000/segment@300000/target-module@4000/epwmss@0/pwm@100         R  ß/ocp/interconnect@48000000/segment@300000/target-module@4000/epwmss@0/counter@180         N  å/ocp/interconnect@48000000/segment@300000/target-module@4000/epwmss@0/pwm@200         D  í/ocp/interconnect@48000000/segment@300000/target-module@e000/lcdc@0       T  ò/ocp/interconnect@48000000/segment@300000/target-module@e000/lcdc@0/port/endpoint@0       D  ù/ocp/interconnect@48000000/segment@300000/target-module@10000/rng@0         ý/ocp/interconnect@47c00000          /ocp/interconnect@4a000000        E  /ocp/interconnect@4a000000/segment@0/target-module@100000/ethernet@0          O  /ocp/interconnect@4a000000/segment@0/target-module@100000/ethernet@0/mdio@1000        O  /ocp/interconnect@4a000000/segment@0/target-module@100000/ethernet@0/slave@200        O  '/ocp/interconnect@4a000000/segment@0/target-module@100000/ethernet@0/slave@300        C  2/ocp/interconnect@4a000000/segment@0/target-module@100000/switch@0        Y  9/ocp/interconnect@4a000000/segment@0/target-module@100000/switch@0/ethernet-ports/port@1          Y  D/ocp/interconnect@4a000000/segment@0/target-module@100000/switch@0/ethernet-ports/port@2          M  O/ocp/interconnect@4a000000/segment@0/target-module@100000/switch@0/mdio@1000          \  _/ocp/interconnect@4a000000/segment@0/target-module@100000/switch@0/mdio@1000/ethernet-phy@0       :  g/ocp/interconnect@4a000000/segment@0/target-module@300000         B  p/ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0         M  v/ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/memories@0          L  €/ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/cfg@26000       a  Š/ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/cfg@26000/clocks/iepclk-mux@30          O  ›/ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/serial@28000        L  ¦/ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/iep@2e000       M  °/ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/ecap@30000          O  »/ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/mii-rt@32000        ]  È/ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/interrupt-controller@20000          L  Ó/ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/pru@34000       L  Ø/ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/pru@38000       M  Ý/ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/mdio@32400            è/ocp/interconnect@4b140000        #  Î/ocp/interrupt-controller@48200000        "  ñ/ocp/target-module@49000000/dma@0         "  ö/ocp/target-module@49800000/dma@0         "  /ocp/target-module@49900000/dma@0         "  /ocp/target-module@49a00000/dma@0         "  /ocp/target-module@47810000/mmc@0           /ocp/target-module@47400000       )   /ocp/target-module@47400000/usb-phy@1300          %   –/ocp/target-module@47400000/usb@1400          )  )/ocp/target-module@47400000/usb-phy@1b00          %   ›/ocp/target-module@47400000/usb@1800          0  2/ocp/target-module@47400000/dma-controller@2000         </ocp/sram@40300000        "  D/ocp/sram@40300000/pm-code-sram@0         %  Q/ocp/sram@40300000/pm-data-sram@1000            ^/ocp/emif@4c000000          c/ocp/gpmc@50000000          h/ocp/target-module@53100000       #  t/ocp/target-module@53100000/sham@0          y/ocp/target-module@53500000       "  „/ocp/target-module@53500000/aes@0         "  ˆ/ocp/target-module@56000000/gpu@0           Œ/fixedregulator0            ™/clk_mcasp0_fixed           ª/clk_mcasp0         µ/sound/simple-audio-card,cpu             	compatible interrupt-parent #address-cells #size-cells model stdout-path i2c0 i2c1 i2c2 serial0 serial1 serial2 serial3 serial4 serial5 d-can0 d-can1 usb0 usb1 phy0 phy1 ethernet0 ethernet1 spi0 spi1 mmc0 mmc1 mmc2 enable-method device_type reg operating-points-v2 clocks clock-names clock-latency cpu-idle-states cpu0-supply entry-latency-us exit-latency-us min-residency-us ti,idle-wkup-m3 phandle syscon opp-hz opp-microvolt opp-supported-hw opp-suspend interrupts ti,hwmods pm-sram ranges reg-names ti,pm-firmware status #clock-cells clock-frequency ti,max-div ti,index-starts-at-one clock-mult clock-div ti,set-rate-parent ti,bit-shift #reset-cells #power-domain-cells ti,sysc-mask ti,sysc-sidle ti,syss-mask gpio-ranges gpio-controller #gpio-cells interrupt-controller #interrupt-cells dmas dma-names pinctrl-names pinctrl-0 ti,pmic-shutdown-controller interrupt-names regulator-compatible regulator-name regulator-always-on regulator-min-microvolt regulator-max-microvolt regulator-boot-on nxp,calib-gpios interrupts-extended pinctrl-1 #sound-dai-cells audio-ports remote-endpoint reset-gpios st,drdy-int-pin orientation #io-channel-cells #pinctrl-cells pinctrl-single,register-width pinctrl-single,function-mask pinctrl-single,pins #phy-cells ti,rproc mboxes ti,scale-data-fw #dma-cells dma-requests dma-masters ti,no-reset-on-init ti,no-idle ti,timer-alwon assigned-clocks assigned-clock-parents system-power-controller ti,spi-num-cs op-mode tdm-slots serial-dir tx-num-evt rx-num-evt ti,timer-pwm ti,needs-special-reset bus-width cd-gpios vmmc-supply #mbox-cells ti,mbox-num-users ti,mbox-num-fifos ti,mbox-send-noirq ti,mbox-tx ti,mbox-rx #hwlock-cells syscon-raminit non-removable ti,sysc-midle #pwm-cells blue-and-red-wiring cpdma_channels ale_entries bd_ram_size mac_control slaves active_slave cpts_clock_mult cpts_clock_shift bus_freq mac-address phys label phy-handle phy-mode ti,dual-emac-pvid resets reset-names firmware-name ti,tptcs ti,edma-memcpy-channels ti,ctrl_mod dr_mode mentor,multipoint mentor,num-eps mentor,ram-bits mentor,power #dma-channels #dma-requests protect-exec pool ti,no-idle-on-init gpmc,num-cs gpmc,num-waitpins power-domains linux,default-trigger default-state enable-gpios simple-audio-card,name simple-audio-card,format simple-audio-card,bitclock-master simple-audio-card,frame-master sound-dai mpu_gate cpu0_opp_table ocp l4_wkup wkup_m3 prcm prcm_clocks clk_32768_ck clk_rc32k_ck virt_19200000_ck virt_24000000_ck virt_25000000_ck virt_26000000_ck tclkin_ck dpll_core_ck dpll_core_x2_ck dpll_core_m4_ck dpll_core_m5_ck dpll_core_m6_ck dpll_mpu_ck dpll_mpu_m2_ck dpll_ddr_ck dpll_ddr_m2_ck dpll_ddr_m2_div2_ck dpll_disp_ck dpll_disp_m2_ck dpll_per_ck dpll_per_m2_ck dpll_per_m2_div4_wkupdm_ck dpll_per_m2_div4_ck clk_24mhz clkdiv32k_ck l3_gclk pruss_ocp_gclk mmu_fck timer1_fck timer2_fck timer3_fck timer4_fck timer5_fck timer6_fck timer7_fck usbotg_fck dpll_core_m4_div2_ck ieee5000_fck wdt1_fck l4_rtc_gclk l4hs_gclk l3s_gclk l4fw_gclk l4ls_gclk sysclk_div_ck cpsw_125mhz_gclk cpsw_cpts_rft_clk gpio0_dbclk_mux_ck lcd_gclk mmc_clk gfx_fclk_clksel_ck gfx_fck_div_ck sysclkout_pre_ck clkout2_div_ck clkout2_ck prcm_clockdomains per_cm l4ls_clkctrl l3s_clkctrl l3_clkctrl l4hs_clkctrl pruss_ocp_clkctrl cpsw_125mhz_clkctrl lcdc_clkctrl clk_24mhz_clkctrl wkup_cm l4_wkup_clkctrl l3_aon_clkctrl l4_wkup_aon_clkctrl mpu_cm mpu_clkctrl l4_rtc_cm l4_rtc_clkctrl gfx_l3_cm gfx_l3_clkctrl l4_cefuse_cm l4_cefuse_clkctrl prm_per prm_wkup prm_device prm_gfx gpio0_target gpio0 uart0 tps dcdc1_reg dcdc2_reg dcdc3_reg ldo1_reg ldo2_reg ldo3_reg ldo4_reg baseboard_eeprom baseboard_data tda19988 hdmi_0 usb2512b lps331ap mpu6050 tscadc am335x_adc scm am33xx_pinmux user_leds_s0 i2c0_pins i2c2_pins uart0_pins clkout2_pin cpsw_default cpsw_sleep davinci_mdio_default davinci_mdio_sleep mmc1_pins emmc_pins nxp_hdmi_bonelt_pins nxp_hdmi_bonelt_off_pins mcasp0_pins usb_hub_ctrl mpu6050_pins lps3331ap_pins scm_conf phy_gmii_sel scm_clocks sys_clkin_ck adc_tsc_fck dcan0_fck dcan1_fck mcasp0_fck mcasp1_fck smartreflex0_fck smartreflex1_fck sha0_fck aes0_fck rng_fck ehrpwm0_tbclk ehrpwm1_tbclk ehrpwm2_tbclk usb_ctrl_mod wkup_m3_ipc edma_xbar scm_clockdomains timer1_target timer1 wdt2 rtc l4_per uart1 uart2 mcasp0 mcasp1 timer2_target timer2 timer3 timer4 timer5 timer6 timer7 gpio1 elm mailbox mbox_wkupm3 hwspinlock cape_eeprom0 cape0_data cape_eeprom1 cape1_data cape_eeprom2 cape2_data cape_eeprom3 cape3_data uart3 uart4 uart5 gpio2 gpio3_target gpio3 dcan0 dcan1 epwmss0 ecap0 eqep0 ehrpwm0 epwmss1 ecap1 eqep1 ehrpwm1 epwmss2 ecap2 eqep2 ehrpwm2 lcdc lcdc_0 rng l4_fw l4_fast mac davinci_mdio cpsw_emac0 cpsw_emac1 mac_sw cpsw_port1 cpsw_port2 davinci_mdio_sw ethphy0 pruss_tm pruss pruss_mem pruss_cfg pruss_iepclk_mux pruss_uart pruss_iep pruss_ecap pruss_mii_rt pruss_intc pru0 pru1 pruss_mdio l4_mpuss edma edma_tptc0 edma_tptc1 edma_tptc2 mmc3 usb usb0_phy usb1_phy cppi41dma ocmcram pm_sram_code pm_sram_data emif gpmc sham_target sham aes_target aes gpu vmmcsd_fixed clk_mcasp0_fixed clk_mcasp0 dailink0_master 